UNIX systems for modern architectures : symmetric multiprocessing and caching for kernel programmers / Curt Schimmel.
By: Schimmel, Curt.
Material type: BookSeries: Addison-Wesley professional computing series.Publisher: Reading, MA : Addison-Wesley, 1994Description: xxiv, 396 p. ; 24 cm.ISBN: 0201633388.Subject(s): UNIX (Computer file) | Computer architectureDDC classification: 005.42Item type | Current library | Call number | Copy number | Status | Date due | Barcode | Item holds |
---|---|---|---|---|---|---|---|
General Lending | MTU Bishopstown Library Lending | 005.42 (Browse shelf(Opens below)) | 1 | Available | 00015320 |
Enhanced descriptions from Syndetics:
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Includes bibliographical references and index.
Review of UNIX Kernel Internals -- Part I: Cache Memory Systems -- Introduction to Cache Memory Systems -- Virtual Caches -- Virtual Caches with keys -- Virtual Caches with physical address tags -- Physical Caches -- Efficient Cache Management Techniques -- Part II: Multiprocessor Systems -- Introduction to Multiprocessor Systems -- Master-Slave Kernels -- Spin-Locked Kernels -- Semaphored Kernels -- Other MP Primitives -- Other Memory Models -- Part III: Multiprocessor Systems with Caches -- Introduction to MP Cache Consistency -- Hardware Cache Consistency.
Table of contents provided by Syndetics
- Preface
- Notational Conventions
- Introduction
- 1 Review of UNIX Kernel Internals
- Introduction
- Processes, Programs, and Threads
- The Process Address Space
- Context Switch
- Memory and Process Management System Calls
- Summary
- Exercises
- Further Reading
- I Cache Memory Systems. @ Chapter
- 2 Introduction to Cache Memory Systems
- Memory Hierarchies
- Cache Fundamentals
- Direct Mapped Caches
- Two-Way Set Associative Caches
- n-Way Set Associative Caches
- Fully Associative Caches
- Summary of n-Way Set Associative Caches
- Cache Flushing
- Uncached Operation
- Separate Instruction and Data Caches
- Cache Performance
- How Cache Architectures Differ
- Exercises
- Further Reading
- 3 Virtual Caches
- Virtual Cache Operation
- Problems with Virtual Caches
- Managing a Virtual Cache
- Summary
- Exercises
- Further Reading
- 4 Virtual Caches with Keys
- The Operation of a Virtual Cache with Keys
- Managing a Virtual Cache with Keys
- Virtual Cache Usage in MMUs
- Summary
- Exercises
- Further Reading
- 5 Virtual Caches with Physical Address Tags
- The Organization of a Virtual Cache with Physical Tags
- Managing a Virtual Cache with Physical Tags
- Summary
- Exercises
- Further Reading
- 6 Physical Caches
- The Organization of a Physical Cache
- Managing a Physical Cache
- Multilevel Caches
- Primary Virtual Cache with Secondary Physical Cache
- Summary
- Exercises
- Further Reading
- 7 Efficient Cache Management Techniques
- Introduction
- Address Space Layout
- Cache Size Bounded FlushingDelayed Cache Invalidations
- Cache-Aligning Data Structures
- Summary
- Exercises
- Further Reading
- II Multiprocessor Systems
- 8 Introduction to Multiprocessor Systems
- Introduction
- The Tightly Coupled, Shared Memory, Symmetric
- Multiprocessor
- The MP Memory Model
- Mutual Exclusion
- Review of Mutual Exclusion on Uniprocessor
- UNIX Systems
- Problems Using UP Mutual Exclusion Policies on MPs
- Summary
- Exercises
- Further Reading
- 9 Master-Slave Kernels
- Introduction
- Spin Locks
- Deadlocks
- Master-Slave Kernel Implementation
- Performance Considerations
- Summary
- Exercises
- Further Reading
- 10 Spin-Locked Kernels
- Introduction
- Giant Locking
- Multithreading Cases Requiring No Locks
- Coarse-Grained Locking
- Fine-Grained Locking
- Effects of Sleep and Wakeup on Multiprocessors
- Summary
- Exercises
- Further Reading
- 11 Semaphored Kernels
- Introduction
- Deadlocks
- Implementing Semaphores
- Coarse-Grained Semaphore Implementations
- Multithreading with Semaphores
- Performance Considerations
- Summary
- Exercises
- Further Reading
- 12 Other MP Primitives
- Introduction
- Monitor
- Eventcounts and Sequencers
Excerpt provided by Syndetics
Author notes provided by Syndetics
Curt Schimmel is an Operating System Architect who has ported and enhanced the UNIX kernel for a wide variety of systems, ranging from microprocessors to multiprocessor supercomputers, and has been involved in the design of new hardware systems to efficiently support the UNIX environment. A former member of AT&T Bell Laboratories' UNIX development team, he is now with Silicon Graphics, Inc., an industry leader in high performance multiprocessor UNIX systems.
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